Daniel Byrne, PhD Candidate
E-mail: djbyrne@mtu.edu Github: byrnedj
I am a fith-year PhD candidate working on improving performance of hybrid caches from a memory organization perspective.
My work uses models of cache miss and writeback ratios to guide paritioning and the design choices of the cache. We call it CLUsivity.
CLUsivity decides (1) where data should reside: DRAM, NVM (or both!), depending on the locality and write-intensity and (2) how much cache space should be given to a particular class of objects in order to maximze performance.
Publications
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Writeback Modeling: Theory and Application to Zipfian Workloads - Wesley Smith, Daniel Byrne, and Chen Ding - MEMSYS’21
paper
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Faster Slab Reassignment in Memcached - Daniel Byrne, Nilufer Onder and Zhenlin Wang - MEMSYS’19
paper
slides
errata
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mPart: Miss-Ratio Curve Guided Partitioning in Key-Value Stores - Daniel Byrne, Nilufer Onder and Zhenlin Wang - ISMM’18
paper
slides
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A Survey of Miss-Ratio Curve Construction Techniques Daniel Byrne - arXiv preprint
paper
Interesting Reads
Does memory leak?
PhD vs. the lottery
A conversation overheard at the Kaleva cafe...
